1. Field of the Invention
Embodiments of the present invention relate to the fabrication of integrated circuits. More particularly, embodiments of the present invention relate to a process for depositing dielectric layers on a substrate.
2. Description of the Related Art
Integrated circuit geometries have dramatically decreased in size since such devices were first introduced several decades ago. Since then, integrated circuits have generally followed the two year/half-size rule (often called Moore""s Law), which means that the number of devices on a chip doubles every two years. Today""s fabrication facilities are routinely producing devices having 0.13 xcexcm and even 0.1 xcexcm feature sizes, and tomorrow""s facilities soon will be producing devices having even smaller feature sizes.
The continued reduction in device geometries has generated a demand for films having lower dielectric constant values because the capacitive coupling between adjacent metal lines must be reduced to further reduce the size of devices on integrated circuits. In particular, insulators having low dielectric constants (k), such as less than about 4.0, are desirable. Examples of insulators having low dielectric constants include spin-on glass, such as un-doped silicon glass (USG) or fluorine-doped silicon glass (FSG), carbon-doped silicon oxide (e.g., Black Diamond(trademark) film, available from Applied Materials, Inc. of Santa Clara, Calif.), and polytetrafluoroethylene (PTFE), which are all commercially available.
More recently, organosilicon films having k values less than about 3.5 have been developed. In an attempt to further lower k values, Rose et al. (U.S. Pat. No. 6,068,884) disclosed a method for depositing an insulator by partially fragmenting a cyclic organosilicon compound to form both cyclic and linear structures in the deposited film. However, this method of partially fragmenting cyclic precursors is difficult to control and thus, product consistency is difficult to achieve.
Many of the currently used organosilicon films having low k values are not hard enough to withstand chemical mechanical polishing used in the fabrication of integrated circuits. Although the organosilicon films can be capped with conventional silicon oxides to improve hardness, such cap layers will increase the effective dielectric constant.
There is a need, therefore, for a controllable process for making harder low dielectric constant materials to improve the speed, efficiency, and durability of devices on integrated circuits.
Embodiments of the invention include a method for depositing a low dielectric constant film having a dielectric constant of about 3.5 or less, preferably about 3 or less, by blending one or more cyclic organosilicon compounds, one or more aliphatic organosilicon compounds, and one or more low molecular weight aliphatic hydrocarbon compounds. In one aspect, a gas mixture comprising one or more cyclic organosilicon compounds, one or more aliphatic organosilicon compounds, and one or more aliphatic hydrocarbon compounds are reacted at conditions sufficient to deposit a low dielectric constant film on a substrate surface. In one embodiment, a method for depositing a low dielectric constant film having a dielectric constant of about 3.5 or less includes reacting a gas mixture including octamethylcyclotetrasiloxane, trimethylsilane, and ethylene at conditions sufficient to deposit the low dielectric constant film on a substrate surface. The gas mixture may further include oxygen and helium.
In another aspect, embodiments of the invention provide a method of depositing a dielectric film having a dielectric constant of about 3 or less and a hardness of between about 1.0 gigaPascal and about 2.9 gigaPascal.